376 lines
14 KiB
Python
376 lines
14 KiB
Python
"""Altium .PrjPcb / .SchDoc / .PcbDoc parser (ported from desktop AltiumParser)."""
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from __future__ import annotations
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import re
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from dataclasses import dataclass, field
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from pathlib import Path
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from typing import Optional
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def sanitize_text(value: str | None) -> str:
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"""Remove NUL bytes — PostgreSQL text fields reject them; SchDoc may contain them."""
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if not value:
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return ""
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return value.replace("\x00", "")
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@dataclass
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class ComponentProperty:
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name: str
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text: str
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def __post_init__(self) -> None:
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self.name = sanitize_text(self.name)
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self.text = sanitize_text(self.text)
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@dataclass
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class DielProperty:
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name: str
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value: str
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height: float
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diel_type: int
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layer_number: int
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def __post_init__(self) -> None:
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self.name = sanitize_text(self.name)
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self.value = sanitize_text(self.value)
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@dataclass
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class ProjectData:
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variant_names: list[str] = field(default_factory=lambda: ["No Variations"])
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components_list: list[list[ComponentProperty]] = field(default_factory=list)
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components_variant_list: list[list[list[ComponentProperty]]] = field(default_factory=list)
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components_prop_variant_list: list[list[ComponentProperty]] = field(default_factory=list)
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component_variant_prop_list: list[ComponentProperty] = field(default_factory=list)
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dnf_designators_list: list[str] = field(default_factory=list)
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dnf_variant_designators_list: list[list[str]] = field(default_factory=list)
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fitted_designators_list: list[str] = field(default_factory=list)
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fitted_variant_designators_list: list[list[str]] = field(default_factory=list)
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prj_params_variant_list: list[list[list[str]]] = field(default_factory=list)
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pcb_layer_count: int = 0
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pcb_diel_materials: list[DielProperty] = field(default_factory=list)
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pcb_doc_file_name: str = ""
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is_waiting_variant_description: bool = False
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current_variant_number: int = 0
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def _read_cp1251_lines(path: Path) -> list[str]:
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raw = path.read_bytes()
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text = raw.decode("cp1251", errors="replace")
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return [line.rstrip("\r\n") for line in text.splitlines()]
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def _read_pipe_chunks(path: Path) -> list[str]:
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"""Read Altium binary-ish docs and extract pipe-separated ASCII chunks per line."""
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raw = path.read_bytes()
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text = raw.decode("cp1251", errors="replace")
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# Also try latin-1 overlay for pipe records that may have been mangled
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return [line for line in text.splitlines() if line.strip()]
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class AltiumParser:
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def __init__(self) -> None:
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self.last_error = ""
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self.pcb_doc_file_name = ""
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def parse_prjpcb(self, filename: str | Path) -> ProjectData:
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path = Path(filename)
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if not path.exists():
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self.last_error = f"File not found: {path}"
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raise FileNotFoundError(self.last_error)
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data = ProjectData()
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data.prj_params_variant_list = [[]] # index 0 = No Variations
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lines = _read_cp1251_lines(path)
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prev = ""
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prev_prev = ""
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for line in lines:
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prj = line.strip()
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self._parse_project_variant_section(prj, data)
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self._parse_component_variations(prj, data)
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self._parse_project_parameters(prev_prev, prev, prj, data)
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self._parse_schdoc_files(prj, path, data)
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self._parse_pcbdoc_files(prj, path, data)
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prev_prev, prev = prev, prj
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# finalize last variant buffers if any
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if data.components_prop_variant_list or data.dnf_designators_list or data.fitted_designators_list:
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self._finalize_current_variant(data)
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self.pcb_doc_file_name = data.pcb_doc_file_name
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return data
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def _finalize_current_variant(self, data: ProjectData) -> None:
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if data.component_variant_prop_list:
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data.components_prop_variant_list.append(list(data.component_variant_prop_list))
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data.component_variant_prop_list.clear()
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if data.components_prop_variant_list:
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data.components_variant_list.append(list(data.components_prop_variant_list))
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data.components_prop_variant_list.clear()
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data.dnf_variant_designators_list.append(list(data.dnf_designators_list))
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data.fitted_variant_designators_list.append(list(data.fitted_designators_list))
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data.dnf_designators_list.clear()
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data.fitted_designators_list.clear()
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def _parse_project_variant_section(self, prj: str, data: ProjectData) -> None:
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upper = prj.upper()
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if len(prj) >= 15 and upper.startswith("[PROJECTVARIANT"):
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data.is_waiting_variant_description = True
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# Extract number if present
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m = re.search(r"(\d+)", prj)
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data.current_variant_number = int(m.group(1)) if m else len(data.variant_names)
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while len(data.prj_params_variant_list) <= data.current_variant_number:
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data.prj_params_variant_list.append([])
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return
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if data.is_waiting_variant_description and upper.startswith("DESCRIPTION="):
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name = prj[12:].strip()
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if name and name not in data.variant_names:
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data.variant_names.append(name)
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data.is_waiting_variant_description = False
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return
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if len(prj) >= 19 and upper.startswith("PARAMVARIATIONCOUNT"):
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self._finalize_current_variant(data)
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def _parse_component_variations(self, prj: str, data: ProjectData) -> None:
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upper = prj.upper()
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parts = prj.split("|")
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if not parts:
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return
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values = parts[0].split("=")
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if len(values) <= 2:
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return
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if "VARIATION" in values[0].upper() and "DESIGNATOR" in values[1].upper():
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designator = values[2]
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prop_list = [ComponentProperty("Designator", designator)]
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kind = "0"
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if len(parts) > 2:
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kind_part = parts[2]
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if "=" in kind_part:
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kind = kind_part.split("=", 1)[1]
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prop_list.append(ComponentProperty("Kind", kind))
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if kind == "1":
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data.dnf_designators_list.append(designator)
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else:
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data.fitted_designators_list.append(designator)
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# flush previous component props into list
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if data.component_variant_prop_list:
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# keep designator props as start of new component
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pass
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data.components_prop_variant_list.append(prop_list)
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return
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if "PARAMVARIATION" in values[0].upper() and "PARAMETERNAME" in values[1].upper():
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prop_name = values[2]
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prop_text = ""
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if len(parts) > 1 and "=" in parts[1]:
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prop_text = parts[1].split("=", 1)[1]
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data.component_variant_prop_list.append(ComponentProperty(prop_name, prop_text))
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# attach to last variation component if present
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if data.components_prop_variant_list:
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data.components_prop_variant_list[-1].append(ComponentProperty(prop_name, prop_text))
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def _parse_project_parameters(
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self, prev_prev: str, prev: str, prj: str, data: ProjectData
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) -> None:
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if not prev_prev.upper().startswith("[PARAMETER"):
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return
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if not prev.upper().startswith("NAME="):
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return
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if not prj.upper().startswith("VALUE="):
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return
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name = prev[5:]
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value = prj[6:]
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idx = data.current_variant_number if "_" in prev_prev else 0
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while len(data.prj_params_variant_list) <= idx:
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data.prj_params_variant_list.append([])
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data.prj_params_variant_list[idx].append([name, value])
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def _parse_schdoc_files(self, prj: str, prj_path: Path, data: ProjectData) -> None:
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if len(prj) < 19:
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return
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if prj[:13].upper() != "DOCUMENTPATH=":
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return
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if prj[-6:].upper() != "SCHDOC":
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return
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rel = prj[13:]
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sch_path = (prj_path.parent / rel).resolve()
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if sch_path.exists():
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self._parse_schdoc_file(sch_path, data.components_list)
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def _parse_pcbdoc_files(self, prj: str, prj_path: Path, data: ProjectData) -> None:
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if len(prj) < 19:
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return
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if prj[:13].upper() != "DOCUMENTPATH=":
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return
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if prj[-6:].upper() != "PCBDOC":
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return
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rel = prj[13:]
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pcb_path = (prj_path.parent / rel).resolve()
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if pcb_path.exists():
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if self._parse_pcbdoc_file(pcb_path, data):
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data.pcb_doc_file_name = str(pcb_path)
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def _parse_schdoc_file(self, path: Path, components_list: list[list[ComponentProperty]]) -> None:
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lines = _read_pipe_chunks(path)
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is_component = False
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is_no_bom = False
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is_first_part = True
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component_props: list[ComponentProperty] = []
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def flush():
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nonlocal component_props, is_no_bom, is_first_part, is_component
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if not is_no_bom and component_props and is_first_part:
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components_list.append(list(component_props))
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component_props = []
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is_no_bom = False
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is_first_part = True
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for line in lines:
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parts = line.split("|")
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i = 0
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while i < len(parts):
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part = parts[i]
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up = part.upper()
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if len(part) == 8 and up == "RECORD=1":
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if is_component:
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flush()
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is_component = True
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i += 1
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continue
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if is_component:
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if up.startswith("COMPONENTKINDVERSION2=5"):
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is_no_bom = True
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elif up.startswith("CURRENTPARTID="):
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if up != "CURRENTPARTID=1" or len(part) > 15:
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is_first_part = False
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elif (
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i + 1 < len(parts)
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and up.startswith("TEXT=")
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and parts[i + 1].upper().startswith("NAME=")
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):
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text = part[5:]
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name = parts[i + 1][5:]
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if not is_no_bom:
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component_props.append(ComponentProperty(name, text))
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i += 2
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continue
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elif up.startswith("HEADER="):
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flush()
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is_component = False
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i += 1
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if is_component:
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flush()
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def _parse_pcbdoc_file(self, path: Path, data: ProjectData) -> bool:
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lines = _read_pipe_chunks(path)
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signal_layerset: Optional[str] = None
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layer_count = 0
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materials: list[DielProperty] = []
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layerset_re = re.compile(r"LAYERSET(\d+)NAME=&Signal Layers", re.I)
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v9_name_re = re.compile(r"V9_STACK_LAYER(\d+)_NAME=", re.I)
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v9_diel_re = re.compile(r"V9_STACK_LAYER(\d+)_DIELTYPE=(\d+)", re.I)
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v8_diel_re = re.compile(r"LAYER_V8_(\d+)_DIELTYPE=(\d+)", re.I)
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found_layerset = False
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for line in lines:
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m = layerset_re.search(line)
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if m:
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signal_layerset = m.group(1)
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found_layerset = True
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for line in lines:
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parts = line.split("|")
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joined = line
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if signal_layerset:
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key = f"LAYERSET{signal_layerset}LAYERS="
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for part in parts:
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if part.upper().startswith(key.upper()):
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layers = part.split("=", 1)[1].split(",")
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layer_count = sum(1 for x in layers if x.strip() and x.strip() != "MultiLayer")
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for m in v9_name_re.finditer(joined):
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n = int(m.group(1))
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layer_count = max(layer_count, n + 1)
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for m in v9_diel_re.finditer(joined):
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n = int(m.group(1))
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diel_type = int(m.group(2))
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height = 0.0
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value = ""
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hkey = f"V9_STACK_LAYER{n}_DIELHEIGHT="
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mkey = f"V9_STACK_LAYER{n}_DIELMATERIAL="
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for part in parts:
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pu = part.upper()
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if pu.startswith(hkey.upper()):
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hraw = part.split("=", 1)[1]
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hraw = re.sub(r"mil", "", hraw, flags=re.I).strip()
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try:
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height = float(hraw) * 0.0254
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except ValueError:
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height = 0.0
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if pu.startswith(mkey.upper()):
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value = part.split("=", 1)[1]
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if value and height > 0:
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materials.append(
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DielProperty("DielMaterial", value, height, diel_type, n)
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)
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for m in v8_diel_re.finditer(joined):
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n = int(m.group(1))
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diel_type = int(m.group(2))
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height = 0.0
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value = ""
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hkey = f"LAYER_V8_{n}_DIELHEIGHT="
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mkey = f"LAYER_V8_{n}_DIELMATERIAL="
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for part in parts:
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pu = part.upper()
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if pu.startswith(hkey.upper()):
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hraw = part.split("=", 1)[1]
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hraw = re.sub(r"mil", "", hraw, flags=re.I).strip()
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try:
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height = float(hraw) * 0.0254
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except ValueError:
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height = 0.0
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if pu.startswith(mkey.upper()):
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value = part.split("=", 1)[1]
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if value and height > 0:
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materials.append(
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DielProperty("DielMaterial", value, height, diel_type, n)
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)
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if not found_layerset and layer_count > 0:
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layer_count -= 1
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data.pcb_layer_count = max(layer_count, 0)
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data.pcb_diel_materials = materials
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return True
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def make_complex_string(text: str, props: list[ComponentProperty]) -> str:
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text = sanitize_text(text)
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if not text.startswith("="):
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return text
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expr = text[1:]
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mapping = {p.name: p.text for p in props}
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def repl(m: re.Match) -> str:
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key = m.group(1)
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return mapping.get(key, "")
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return sanitize_text(re.sub(r"['\"]([^'\"]+)['\"]", repl, expr))
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def find_prjpcb(extract_dir: Path) -> Optional[Path]:
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candidates = list(extract_dir.rglob("*.PrjPcb")) + list(extract_dir.rglob("*.prjpcb"))
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return candidates[0] if candidates else None
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